When thinking about IC design at mature nodes that exist for more than 20 years (like 180nm), one would argue that the foundries have covered every aspect of Electrostatic Discharge (ESD), Electrical Overstress (EOS) and Latch-up long ago. However, what we have learned by supporting those innovative startups is that many of the applications in IoT (Internet of Things) require non-standard on-chip ESD protection clamps for a number of reasons.
- Several IoT systems include sensor or actuator interfaces that come with distinctive signal conditions. E.g. the driving voltage of the implanted chip to restore hearing for (near) deaf people is in the order of 20V, much beyond the typical I/O interfaces provided by the foundry or I/O providers. Similarly, small signals (order of a few mV or mA) captured by sensors for motion detection and touch remain hidden in the noise or are lost due to leakage created by General Purpose Input Output circuits (GPIO).
- Every (innovative) system needs to communicate with its surroundings or directly with ‘the internet’. Therefore wireless interfaces and/or high speed digital connections can be found on almost all of the systems. For both (wireless, wired) the IC designer needs on-chip ESD protection with low parasitic capacitance (200fF or lower). This means that most of the general purpose interface circuits provided by the foundry are not suitable and alternatives have to be created.
- A lot of the innovative systems are meant to be low-cost and mobile and also this relates to ESD in several ways. To reduce the size of the system and the Bill of Materials (BOM), system designers are removing board level ESD protection blocks from the mini-Printed Circuit Boards (PCB). These Transient Voltage Suppressors (TVS) devices were added on PCBs 20 years ago to protect ICs against ESD stress during the actual use of products. Without those TVS-blocks and due to the much shorter PCB traces Integrated Circuits are stressed with more severe ESD stress like IEC 61000-4-2. This has a factor of 4 to 5 higher stress current compared to component level Human Body Model (HBM) ESD.
- Moreover, the probability of ESD stress is much higher in those mobile systems as they are operated in so-called harsh environments. Consider that plastic (e.g. smartphone cover) rubbed by cloth (your back-pocket) generates a lot of charges – just millimeters away from the high speed USB port.
In a seminar (Shanghai, September 2015) Sofics summarized the main ESD challenges and provided information about ESD concepts that can be used for IoT applications.
Related information from Sofics
- Taiwan ESD and reliability conference 2010 contribution on ESD protection of wireless interfaces
- There is a push to use Silicon On Insulator (SOI) technology for Internet of Things because of the ultra-low power advantages. Another seminar tackled the ESD challenges for SOI technologies.