Sofics engineers developed revolutionary on-chip ESD devices to protect interfaces up to 80V against EOS/ESD. PowerQubic is immune to latch-up and electrical overstress.
Design without constraints
- Customizable protection: easily adapt for a broad set of reliability and functional requirements
- Protect against most severe specifications like IEC 61000-4-2, ISO 7637-2, transient latch-up
Reduce time to market by several months
- Customized EOS/ESD solutions can be delivered within a few days for TSMC 0.25um and 0.18um BCD technologies.
- High voltage concepts proven in and portable to advanced CMOS (65nm, 28nm)
- Proven in more than 20 projects and applications
Strongly reduce IC cost
- Silicon and product proven ESD solutions help to reduce IC development costs
- Smaller silicon footprint – reduce production cost by up to 10% through smaller dies
- Compatible with standard CMOS/BCD process flow. There is no need to adapt the process.