ESD protection in FinFET technology

Sofics has verified its TakeCharge ESD protection clamps on technology nodes between 0.25um CMOS down to 28nm across various fabs and foundries. The ESD clamp concepts are silicon and product proven in more than 3000 mass produced IC-products. The Sofics ESD clamps provide competitive advantage through improved yield, reduced silicon footprint and enable advanced multimedia and wireless interfaces like HDMI, USB 3.0, SATA, WIFI, GPS and Bluetooth.

In 2015, Sofics engineers have transferred the TakeCharge concepts to a FinFET technology. It included an analysis of the technology.

Voltage domains included in the Sofics analysis

Analysis summary report is available

On-chip ESD protection for FinFET circuits is not easy due to the sensitive transistors and the increased design complexity. Many of the traditional ESD solutions are no longer suitable.

Sofics has silicon proven ESD clamp solutions for all the different voltage domains

Contact Sofics to get a copy of the report.

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